검색결과 : 2건
| No. | Article |
|---|---|
| 1 |
Modeling boron dose loss in sidewall spacer stacks of complementary metal oxide semiconductor transistors Essa Z, Pelletier B, Morin P, Boulenc P, Pakfar A, Tavernier C, Wacquant F, Zechner C, Juhel M, Autran JL, Cristiano F Solid-State Electronics, 126, 163, 2016 |
| 2 |
Parasitic bipolar impact in 32 nm undoped channel Ultra-Thin BOX (UTBOX) and biased Ground Plane FDSOI high-k/metal gate technology Fenouillet-Beranger C, Perreau P, Boulenc P, Tosti L, Barnola S, Andrieu F, Weber O, Beneyton R, Perrot C, de Buttet C, Abbate F, Campidelli Y, Pinzelli L, Gouraud P, Margain A, Peru S, Bourdelle KK, Nguyen BY, Boedt F, Poiroux T, Faynot O, Skotnicki T, Boeuf F Solid-State Electronics, 74, 32, 2012 |