| 1 |
Gate-induced drain leakage (GIDL) in MFMIS and MFIS negative capacitance FinFETs
Min J, Choe G, Shin C
Current Applied Physics, 20(11), 1222, 2020 |
| 2 |
Comparison of two-prototype near-horizontal Drain Water Heat Recovery units on the basis of effectiveness
Pochwat K, Kordana S, Starzec M, Slys D
Energy, 173, 1196, 2019 |
| 3 |
Decentralized drain water heat recovery: A probabilistic method for prediction of wastewater and heating system interaction
Spriet J, McNabola A
Energy and Buildings, 183, 684, 2019 |
| 4 |
Decentralized drain water heat recovery from commercial kitchens in the hospitality sector
Spriet J, McNabola A
Energy and Buildings, 194, 247, 2019 |
| 5 |
Experimental observation of zero DIBL in short-channel hysteresis-free ferroelectric-gated FinFET
Shin J, Shin C
Solid-State Electronics, 153, 12, 2019 |
| 6 |
Investigation of transient current characteristics with scaling-down poly-Si body thickness and grain size of 3D NAND flash memory
Lee SH, Kwon DW, Kim S, Baek MH, Lee S, Kang J, Jang W, Park BG
Solid-State Electronics, 152, 41, 2019 |
| 7 |
Device scaling considerations for sub-90-nm 2-bit/cell split-gate flash memory cell
Xu ZZ, Liu DH, Hu J, Chen WJ, Qian WS, Kong WR, Zou SC
Solid-State Electronics, 152, 46, 2019 |
| 8 |
Improvement in drain-induced-barrier-lowering and on-state current characteristics of bulk Si fin field-effect-transistors using high temperature Phosphorus extension ion implantation
Kikuchi Y, Hopf T, Mannaert G, Everaert JL, Kubicek S, Eyben P, Waite A, Borniquel JID, Variam N, Mocuta D, Horiguchi N
Solid-State Electronics, 152, 58, 2019 |
| 9 |
Optimization of a TiSi2 formation based on PECVD Ti using DoE methodology
Hossler D, Ernst M
Solid-State Electronics, 158, 51, 2019 |
| 10 |
Compact modeling of the subthreshold characteristics of junctionless double-gate FETs including the source/drain extension regions
Bae MS, Yun I
Solid-State Electronics, 156, 48, 2019 |
