검색결과 : 14건
| No. | Article |
|---|---|
| 1 |
Characterization of single-sided gate-to-drain non-overlapped implantation nMOSFETs for multi-functional non-volatile memory applications Jeng ES, Chen YF, Chang CC, Peng KM, Chou SW, Ho CW, Huang CF, Gong J Solid-State Electronics, 68, 73, 2012 |
| 2 |
Non volatile memory reliability evaluation based on oxide defect generation rate during stress and retention test Aziza H, Portal JM, Plantier J, Reliaud C, Regnier A, Ogier JL Solid-State Electronics, 78, 151, 2012 |
| 3 |
A single-poly EEPROM cell for embedded memory applications Di Bartolomeo A, Rucker H, Schley P, Fox A, Lischke S, Na KY Solid-State Electronics, 53(6), 644, 2009 |
| 4 |
TCAD-based demonstration of improved spacer select gate EEPROM cell architecture Bahng YS Solid-State Electronics, 53(9), 921, 2009 |
| 5 |
New physical model to explain logarithmic time dependence of data retention in flash EEPROM Kamohara S, Okumura T Applied Surface Science, 254(19), 6174, 2008 |
| 6 |
New EEPROM concept for single bit operation Raguet JR, Laffont R, Bouchakour R, Bidal V, Regnier A, Mirabel JM Solid-State Electronics, 52(10), 1525, 2008 |
| 7 |
An experimental method allowing quantifying and localizing failed cells of an EEPROM CAST after a retention test Le Roux C, Lopez L, Firiti A, Ogier JL, Lalande F, Laffont R, Micolau G Solid-State Electronics, 52(10), 1550, 2008 |
| 8 |
Embedded EEPROM design in PD-SOI for application in an extended temperature range (-40 degrees C up to 200 degrees C) Richter S, Kirsten D, Richter S, Nuernbergk D Solid-State Electronics, 49(9), 1484, 2005 |
| 9 |
A new low voltage fast SONOS memory with high-k dielectric Gritsenko VA, Nasyrov KA, Novikov YN, Aseev AL, Yoon SY, Lee JW, Lee EH, Kim CW Solid-State Electronics, 47(10), 1651, 2003 |
| 10 |
NROM (TM) - a new technology for non-volatile memory products Bloom I, Pavan P, Eitan B Solid-State Electronics, 46(11), 1757, 2002 |