| 1 |
I-on/I-off ratio enhancement and scalability of gate-all-around nanowire negative-capacitance FET with ferroelectric HfO2
Jang K, Saraya T, Kobayashi M, Hiramoto T
Solid-State Electronics, 136, 60, 2017 |
| 2 |
Special Issue: Planar Fully-Depleted SOI technology Foreword
Allibert F, Hiramoto T, Nguyen BY
Solid-State Electronics, 117, 1, 2016 |
| 3 |
Transport behaviors and mechanisms in cuspidal blockade region for silicon single-hole transistor
Lee Y, Lee S, Hiramoto T
Current Applied Physics, 14(3), 428, 2014 |
| 4 |
Characteristics control of room-temperature operating single electron transistor with floating gate by charge pump circuit
Nozue M, Suzuki R, Nomura H, Saraya T, Hiramoto T
Solid-State Electronics, 88, 61, 2013 |
| 5 |
Silicon on thin BOX (SOTB) CMOS for ultralow standby power with forward-biasing performance booster
Ishigaki T, Tsuchiya R, Morita Y, Yoshimoto H, Sugii N, Iwamatsu T, Oda H, Inoue Y, Ohtou T, Hiramoto T, Kimura S
Solid-State Electronics, 53(7), 717, 2009 |
| 6 |
Identification of endogenous surrogate ligands for human P2Y(12) receptors by in silico and in vitro methods
Nonaka Y, Hiramoto T, Fujita N
Biochemical and Biophysical Research Communications, 337(1), 281, 2005 |
| 7 |
Body factor conscious modeling of single gate fully depleted SOI MOSFETs for low power applications
Kumar A, Nagumo T, Tsutsui G, Ohtou T, Hiramoto T
Solid-State Electronics, 49(6), 997, 2005 |
| 8 |
Analytical model of body factor in short channel bulk MOSFETs for low voltage applications
Kumar A, Nagumo T, Tsutsui G, Hiramoto T
Solid-State Electronics, 48(10-11), 1763, 2004 |
