검색결과 : 7건
| No. | Article |
|---|---|
| 1 |
Modeling of low frequency noise in FD SOI MOSFETs El Husseini J, Martinez F, Valenza M, Ritzenthaler R, Lime F, Iniguez B, Faynot O, Le Royer C, Andrieu F Solid-State Electronics, 90, 116, 2013 |
| 2 |
Improved 1/f noise characterization of strained SiGe on insulator MOSFETs fabricated on wafers obtained by the Ge enrichment technique Valenza M, Husseini JE, Martinez F, Bawedin M, Le Royer C, Damlencourt JF Solid-State Electronics, 70, 27, 2012 |
| 3 |
Characterization of impact of process options in Germanium-On-Insulator (GeOI) high-k & metal gate pMOSFETs by low-frequency noise Valenza M, Gyani J, Martinez F, Soliveres S, Le Royer C, Augendre E, Clavelier L Solid-State Electronics, 59(1), 34, 2011 |
| 4 |
Dual strained channel CMOS in FDSOI architecture: New insights on the device performance Le Royer C, Casse M, Cooper D, Andrieu F, Weber O, Brevard L, Perreau P, Damlencourt JF, Baudot S, Previtali B, Tabone C, Allain F, Scheiblin P, Rauer C, Figuet C, Aulnette C, Daval N, Nguyen BY, Bourdelle KK, Gyani J, Valenza M Solid-State Electronics, 65-66, 9, 2011 |
| 5 |
dc and low frequency noise analysis of Fowler-Nordheim stress of n-channel metal-oxide semiconductor field-effect transistors processed in a 65 nm technology Armand J, Martinez F, Benoit P, Valenza M, Vincent E, Huard V, Rochereau K Journal of Vacuum Science & Technology B, 27(3), 1129, 2009 |
| 6 |
Investigation of 1/f noise in germanium-on-insulator 0.12 mu m PMOS transistors from weak to strong inversion Gyani J, Valenza M, Soliveres S, Martinez F, Le Royer C, Augendre E, Romanjek K, Drazek C Solid-State Electronics, 53(12), 1268, 2009 |
| 7 |
1/f noise measurements in n-channel MOSFETs processed in 0.25 mu m technology - Extraction of BSIM3v3 noise parameters Allogo YA, de Murcia M, Vildeuil JC, Valenza M, Llinares P, Cottin D Solid-State Electronics, 46(3), 361, 2002 |