| 1 |
Voltage-controlled multiple-valued logic design using negative differential resistance devices
Gan KJ, Tsai CS, Chen YW, Yeh WK
Solid-State Electronics, 54(12), 1637, 2010 |
| 2 |
Terahertz Schottky barrier diodes with various isolation designs for advanced radio frequency applications
Chen SM, Fang YK, Juang FR, Yeh WK, Chao CP, Tseng HC
Thin Solid Films, 519(1), 471, 2010 |
| 3 |
A high current gain gate-controlled lateral bipolar junction transistor with 90 nm CMOS technology for future RF SoC applications
Chen SM, Fang YK, Yeh WK, Lee IC, Chiang YT
Solid-State Electronics, 52(8), 1140, 2008 |
| 4 |
Significant improvement of 45 nm and beyond complementary metal oxide semiconductor field effect transistor performance with fully silicided and ultimate spacer process technology
Hsu CW, Fang YK, Lin CT, Yeh WK, Hsu CH, Lai CM, Cheng LW, Ma M
Thin Solid Films, 516(21), 7741, 2008 |
| 5 |
The impact of gate oxide scaling (3.2-1.2 nm) on sub-100 nm complementary metal-oxide-semiconductor field-effect transistors
Yeh WK, Lin CY
Thin Solid Films, 419(1-2), 218, 2002 |
| 6 |
A New Tungsten Gate Metal-Oxide-Semiconductor Capacitor Using a Chemical-Vapor-Deposition Process
Yeh WK, Shiau YC, Chen MC
Journal of the Electrochemical Society, 144(1), 214, 1997 |
| 7 |
Thermal-Stability of W-Contacted Junction Diodes
Yeh WK, Chan KY, Chang TC, Chen MC, Lin MS
Journal of the Electrochemical Society, 143(6), 2053, 1996 |
| 8 |
Effect of Surface Pretreatment of Submicron Contact Hole on Selective Tungsten Chemical-Vapor-Deposition
Yeh WK, Chen MC, Lin MS
Journal of Vacuum Science & Technology B, 14(1), 167, 1996 |
| 9 |
An Efficient Preclean of Aluminized Silicon Substrate for Chemical-Vapor-Deposition of Submicron Tungsten Plugs
Yeh WK, Tsai MH, Chen SH, Chen MC, Wang PJ, Liu LM, Lin MS
Journal of the Electrochemical Society, 142(10), 3584, 1995 |
| 10 |
Selective Tungsten CVD on Submicron Contact Hole
Yeh WK, Chen MC, Wang PJ, Liu LM, Lin MS
Thin Solid Films, 270(1-2), 462, 1995 |
