검색결과 : 213건
No. | Article |
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1 |
Experimental analysis and improvement of the DC method for self-heating estimation Mori CAB, Agopian PGD, Martino JA Solid-State Electronics, 159, 171, 2019 |
2 |
SOI MESFETs on high-resistivity, trap-rich substrates Mehr P, Zhang X, Lepkowski W, Li CJ, Thornton TJ Solid-State Electronics, 142, 47, 2018 |
3 |
X-band T/R switch with body-floating multi-gate PDSOI NMOS transistors Park M, Min BW Solid-State Electronics, 141, 69, 2018 |
4 |
Investigating the effect of silicon thickness on ultra-thin silicon on insulator as a compliant substrate for gallium arsenide heteroepitaxial growth Noh S, Hao XJ, Liu ZH, Green MA, Lee S, Ho-Baillie A Thin Solid Films, 653, 371, 2018 |
5 |
Reliable gate stack and substrate parameter extraction based on C-V measurements for 14 nm node FDSOI technology Mohamad B, Leroux C, Rideau D, Haond M, Reimbold G, Ghibaudo G Solid-State Electronics, 128, 10, 2017 |
6 |
An in-depth analysis of temperature effect on DIBL in UTBB FD SOI MOSFETs based on experimental data, numerical simulations and analytical models Pereira ASN, de Steel G, Planes N, Haond M, Giacomini R, Flandre D, Kilchytska V Solid-State Electronics, 128, 67, 2017 |
7 |
RF SOI CMOS technology on 1st and 2nd generation trap-rich high resistivity SOI wafers Esfeh BK, Makovejev S, Basso D, Desbonnets E, Kilchytska V, Flandre D, Raskin JP Solid-State Electronics, 128, 121, 2017 |
8 |
Analytical model for thin-film SOI PIN-diode leakage current Schmidt A, Dreiner S, Vogt H, Goehlich A, Paschen U Solid-State Electronics, 130, 4, 2017 |
9 |
An accurate model for predicting high frequency noise of nanoscale NMOS SOI transistors Shen YF, Cui J, Mohammadi S Solid-State Electronics, 131, 45, 2017 |
10 |
The electronic structure peculiarities of a strained silicon layer in silicon-on-insulator: Experimental and theoretical data Terekhov VA, Nesterov DN, Domashevskaya EP, Geraskina EV, Manyakin MD, Kurganskii SI, Kamayev GN, Antonenko AH, Turishchev SY Applied Surface Science, 382, 331, 2016 |