1 - 1 |
Selected papers from ULIS 2013 Foreword Leadley D, Parker E |
2 - 6 |
Analytical temperature dependent model for nanoscale double-gate MOSFETs reproducing advanced transport models Cheralathan M, Sampedro C, Gamiz F, Iniguez B |
7 - 11 |
Integration aspects of strained Ge pFETs Witters L, Eneman G, Mitard J, Vincent B, Hikavyy A, Milenin AP, Mertens S, Thean A, Collaert N |
12 - 19 |
In depth static and low-frequency noise characterization of n-channel FinFETs on SOI substrates at cryogenic temperature Achour H, Cretu B, Routoure JM, Carin R, Talmat R, Benfdila A, Simoen E, Claeys C |
20 - 25 |
Electrical characterization of thulium silicate interfacial layers for integration in high-k/metal gate CMOS technology Litta ED, Hellstrom PE, Henkel C, Ostling M |
26 - 31 |
Silicon nanowires integrated with CMOS circuits for biosensing application Jayakumar G, Asadollahi A, Hellstrom PE, Garidis K, Ostling M |
32 - 37 |
Strained silicon based complementary tunnel-FETs: Steep slope switches for energy efficient electronics Knoll L, Richter S, Nichau A, Trellenkamp S, Schafer A, Wirths S, Blaeser S, Buca D, Bourdelle KK, Zhao QT, Mantl S |
38 - 44 |
Three-state resistive switching in HfO2-based RRAM Lian XJ, Miranda E, Long SB, Perniola L, Liu M, Sune J |
45 - 49 |
Investigation on the electrical properties of superlattice FETs using a non-parabolic band model Maiorano P, Gnani E, Grassi R, Gnudi A, Reggiani S, Baccarani G |
50 - 54 |
Study of an embedded buried SiGe structure as a mobility booster for fully-depleted SOI MOSFETs at the 10 nm node Morvan S, Andrieu F, Barbe JC, Ghibaudo G |
55 - 62 |
Electron mobility extraction in triangular gate-all-around Si nanowire junctionless nMOSFETs with cross-section down to 5 nm Najmzadeh M, Berthome M, Sallese JM, Grabinski W, Ionescu AM |
63 - 69 |
Models for the use of commercial TCAD in the analysis of silicon-based integrated biosensors Pittino F, Palestri P, Scarbolo P, Esseni D, Selmi L |
70 - 74 |
Prospects for SiGe thermoelectric generators Samarelli A, Llin LF, Cecchi S, Frigerio J, Chrastina D, Isella G, Gubler EM, Etzelstorfer T, Stangl J, Zhang Y, Weaver JMR, Dobson PS, Paul DJ |
75 - 80 |
Silicon-germanium nanowire tunnel-FETs with homo- and heterostructure tunnel junctions Richter S, Blaeser S, Knoll L, Trellenkamp S, Fox A, Schafer A, Hartmann JM, Zhao QT, Mantl S |
81 - 87 |
Technological development of high-k dielectric FinFETs for liquid environment Rigante S, Scarbolo P, Bouvet D, Wipf M, Bedner K, Ionescu AM |
88 - 92 |
Strain effects on n-InGaAs heterostructure-on-insulator made by direct wafer bonding Rossel C, Weigele P, Czornomaz L, Daix N, Caimi D, Sousa M, Fompeyrine J |
93 - 98 |
Flat single crystal Ge membranes for sensors and opto-electronic integrated circuitry Shah VA, Myronov M, Rhead SD, Halpin JE, Shchepetov A, Prest MJ, Prunnila M, Whall TE, Parker EHC, Leadley DR |
99 - 105 |
Drain bias effects on statistical variability and reliability and related subthreshold variability in 20-nm bulk planar MOSFETs Wang XS, Brown AR, Cheng BJ, Roy S, Asenov A |