Solid-State Electronics

Solid-State Electronics, Vol.46, No.7 Entire volume, number list

ISSN: 0038-1101 (Print)

In this Issue (20 articles)

937 - 937	Special issue on Ultimate Integration of Silicon (ULIS 2001) - Foreword Balestra F
939 - 950	The vertical replacement-gate (VRG) MOSFET Hergenrother JM, Oh SH, Nigam T, Monroe D, Klemens FP, Kornblit A
951 - 958	Current status and future directions of SOI technology Yoshimi M
959 - 963	Transistor optimisation for a low cost, high performance 0.13 mu m CMOS technology Augendre E, Kubicek S, De Keersgieter A, Mertens S, Lindsay R, Verbeeck R, Van Laer J, Dupas L, Badenes G
965 - 970	Substrate current and degradation of trench LDD transistors Landgraf E, Hofmann F, Schulz T, von Philipsborn H
971 - 975	Thorough characterization of deep-submicron surface and buried channel pMOSFETs Cretu B, Fadlallah M, Ghibaudo G, Jomaah J, Balestra F, Guegan F
977 - 983	1/f noise in 0.18 mu m technology n-MOSFETs from subthreshold to saturation Allogo YA, Marin M, de Murcia M, Llinares P, Cottin D
985 - 989	Planar and vertical double gate concepts Schulz T, Rosner W, Landgraf E, Risch L, Langmann U
991 - 995	Electrical characterization of low thermal budget gate oxides on Si/Si0.8Ge0.2/Si substrates Sareen A, Lindgren AC, Lundgren P, Bengtsson S
997 - 1004	Low Schottky barrier source/drain for advanced MOS architecture: device design and material considerations Dubois E, Larrieu G
1005 - 1011	An asymmetric channel SOI nMOSFET for improving DC and microwave characteristics Dehan M, Raskin JP
1013 - 1017	Impact of front oxide quality on transient effects and low-frequency noise in partially and fully depleted SOIN-MOSFETs Haendler S, Dieudonne F, Jomaah J, Balestra F, Raynaud C, Pelloie JL
1019 - 1025	Soft breakdown current noise in ultra-thin gate oxides Cester A, Bandiera L, Ghidini G, Bloom I, Paccagnella A
1027 - 1032	Resonant electron tunneling through defects in ultrathin SiO2 gate oxides in MOSFETs Stadele M, Fischer B, Tuttle BR, Hess K
1033 - 1037	High-frequency operation potential of the tunnel emitter transistor Aderstedt E, Lundgren P
1039 - 1044	Bardeen's approach for tunneling evaluation in MOS structures Clerc R, Ghibaudo G, Pananakakis G
1045 - 1050	Impact of technological parameters on non-stationary transport in realistic 50 nm MOSFET technology Munteanu D, Le Carval G, Guegan G
1051 - 1059	DYNAMOS: a numerical MOSFET model including quantum-mechanical and near-interface trap transient effects Masson P, Autran JL, Munteanu D
1061 - 1067	Short-range and long-range Coulomb interactions for 3D Monte Carlo device simulation with discrete impurity distribution Barraud S, Dollfus P, Galdin S, Hesto P
1069 - 1073	Can photon emission/absorption processes explain the substrate current of tunneling MOS capacitors? Dalla Serra A, Palestri P, Selmi L