A deep level transient spectroscopy (DLTS) study of defects created by low-fuence, low-energy ion implantation for development of ion-implanted silicon field-effect transistors for spin-dependent transport experiments is presented Standard annealing strategies are considered to activate the implanted dopants and repair the implantation damage in test metal-oxide-semiconductor (MOS) capacitors Fixed oxide charge, interface trapped charge and the role of minority carriers in DLTS are investigated. A furnace anneal at 950 degrees C was found to activate the dopants but did not repair the implantation damage as efficiently as a 1000 degrees C rapid thermal anneal No evidence of bulk traps was observed after either of these anneals The ion-implanted spin-dependent transport device is shown to have expected characteristics using the processing strategy determined in this study. (c) 2009 Elsevier B.V. All rights reserved.