The solid phase epitaxy (SPE) of undoped amorphous Si (a-Si) deposited on SiO2 patterned Si(001) wafers by reduced pressure chemical vapor deposition (RPCVD) using a H-2-Si2H6 gas system was investigated. The SPE was performed by applying in-situ postannealing directly after deposition process. By transmission electron microscopy (TEM) and scanning electron microscopy, we studied the lateral SPE (L-SPE) length on sidewall and mask for various postannealing times, temperatures and a-Si thicknesses. We observed an increase in L-SPE growth for longer postannealing times, temperatures and larger Si thicknesses on mask. TEM defect studies revealed that by SPE crystallized epi-Si exhibits a higher defect density on the mask than at the inside of the mask window. By introducing SiO2-cap on the sample with 180 nm Si thickness following postannealing at 570 degrees C for 5 h, the crystallization of up to 450 nm epi-Si from a-Si is achieved. We demonstrated the possibility to use this technique for SiGe:C heterojunction bipolar transistor (HBT) base layer stack to crystallize Si-buffer layer to widen the monocrystalline region around the bipolar window and to improve base link resistivity of the HBT. (C) 2011 Elsevier B. V. All rights reserved.