After decades of process scaling driven by Moore's law, the silicon microelectronics world is now defined by length scales that are many times smaller than the dimensions of typical micro-optical components. This size mismatch poses an important challenge for those working to integrate photonics with complementary metal oxide semiconductor (CMOS) electronics technology. One promising solution is to fabricate optical systems at metal/ dielectric interfaces, where electromagnetic modes called surface plasmon polaritons (SPPs) offer unique opportunities to confine and control light at length scales below 100 nm (refs 1, 2). Research groups working in the rapidly developing field of plasmonics have now demonstrated many passive components(3,4) that suggest the potential of SPPs for applications in sensing(5) and optical communication(6). Recently, active plasmonic devices based on III-V materials(7-9) and organic materials(10) have been reported. An electrical source of SPPs was recently demonstrated using organic semiconductors by Koller and colleagues(11). Here we show that a silicon-based electrical source for SPPs can be fabricated using established low-temperature microtechnology processes that are compatible with back-end CMOS technology.