We have investigated the influences of the gate-oxide preparation process on the properties of 4H-SiC MOS interface and MOSFETs. Quite different behaviors between n- and p-type SiC MOS interface properties were observed depending on the preparation process of the gate oxide. The results suggested that the interface state density D(it) near the conduction band and valence band have a different origin. The lower D(it) near the conduction band of the MOS interface resulted in the lower threshold voltage and higher channel mobility for the MOSFETs.