In this work a multi-step nucleation-deposition MW-CVD process is presented developed for contiguous covering of 3 dimensional Si bulk micromachined structures. A correlation between the nucleation rate and the electric field distribution over the 3D surface was established. The layer integrity was characterised by scanning electron and atomic force microscopy. The pinhole density of the layers was measured by conventional alkaline underetching method. This technique is primarily suitable for the characterisation of layers deposited on flat surfaces and was used as a reference for the electrochemical method applied for the non-planar surfaces. Application of the protective coating was demonstrated on the surface of a Si capacitive pressure sensor chip.