This work reports on the integration of n-type lateral-drain-extended MOS transistors (LDMOS) in a 0.13 mu m SiGe BiCMOS technology. The transistors are realized with no additional process steps using the core dual-gate-oxide CMOS flow only. LDMOS drift regions are formed by compensating lightly-doped drain (LDD) implantations of NMOS and PMOS transistors of the baseline process. Stable operation with less than 10% parameter variations in 10 years is achieved up to operating voltages V(DD,max) of 10 v for devices with breakdown voltages BV(DSS) = 30 V and on-resistances R(ON) = 7.3 Omega mm. Devices for different operating voltages V(DD,max) are realized by layout variations. Devices with V(DD,max) = 6 V demonstrate breakdown voltages BV(DSS) = 25 V. on-resistances R(ON) = 4.9 Omega mm, and peak transit frequencies f(T) = 32 GHz. (C) 2011 Published by Elsevier Ltd.