A detailed characterization and modeling of the low frequency noise in a CMOS inverter is presented for the first time. A low frequency noise model for the load current and the output voltage is developed based on the carrier number fluctuations scheme. This model allows obtaining a consistent description of the,noise characteristics of CMOS inverters issued from a 45 nm bulk CMOS technology. It should constitute a reliable theoretical framework for further analysis of the impact of time fluctuations on the static and dynamic operation of CMOS inverter based circuits. (C) 2013 Elsevier Ltd. All rights reserved.