Solid-State Electronics, Vol.90, 2-11, 2013
A systematic study of the sharp-switching Z(2)-FET device: From mechanism to modeling and compact memory applications
This paper presents a systematic study of a sharp-switching device built in fully-depleted silicon-on-insulator (FD-SOI) that we have called Z(2)-FET, as it features zero subthreshold swing (<1 mv/decade of current) and zero impact ionization. The Z(2)-FET is a compact device with a single front gate that experimentally demonstrates a current I-ON/I-OFF ratio >10(8) at low supply voltage, as well as gate-controlled hysteresis. The operating principle of the sharp switching involves the positive feedback between carrier flow and gate-controlled injection barriers, as confirmed by TCAD simulations. We discuss the impact of bias and device dimensions on the experimental performance and simulate the Z(2)-FET's ultimate scaling capability to <50 nm channel length. We present a simplified compact model of the Z(2)-FET. With good reliability and relative insusceptibility to temperature variation, the envisioned applications of the Z(2)-FET include compact, high-speed one transistor DRAM (1T-DRAM), one-transistor SRAM, fast logic and electrostatic discharge (ESD) protection circuits. (C) 2013 Published by Elsevier Ltd.