The influence of different spacer lengths and tilt-implantation on underlapped devices compared to the standard S/D junctions (with Lightly Doped Drain - LDD) on fully depleted (FD) SOI MOSFETs with Ultra-Thin Buried Oxide (UTBOX) at room and high temperatures is explored. It is shown that devices with longer spacers and no LDD implantation increase the underlap region between the gate edge and the S/D regions, increase the immunity to short channel effects and improve the analog performance even at high temperatures. However, the lateral dopant diffusion can reduce or suppress the underlap formation, mainly for smaller spacer length. Tilt-implanted devices exhibit the same trend as the devices with LDD. The angled implantation favors the dopant diffusion into the underlap regions, which degrades the transistor performance. (C) 2013 Elsevier Ltd. All rights reserved.