An optimized asymmetric coding strategy is proposed to improve the reliability of the NAND flash memories. The previously reported asymmetric coding reduces the data-retention error by decreasing the population of the V-TH state which has higher error rate, and is measured on 4xnm NAND flash memory [1]. In [2], by increasing the number of the lowest V-TH state, the proposed asymmetric coding strategy reduces the V-PGM disturbance, and alleviates the floating-gate (FG)-FG coupling. And also, the program-disturb bit error rates (BERs) in 2xnm, 3xnm, and 4xnm NAND flash memories are reduced by 71%, 73%, and 89%, respectively. In this paper, the effect of asymmetric coding on the data-retention error is investigated in 2xnm NAND flash memory. From the measured results, the proposed asymmetric coding effectively increases the population of the lowest V-TH state which has no data-retention error. The data-retention BERs in 2xnm, 3xnm and 4xnm NAND are decreased by 17%, 52% and 70%, respectively. (C) 2013 Elsevier Ltd. All rights reserved.