The stress in porous Si could affect the integration of porous Si devices with microelectronic integrated circuits based on silicon. In this paper, aligned macropore arrays without the stress were fabricated by an electrochemical etching procedure under a control voltage. The several etching stages of aligned macropore arrays were examined by microscopic technique, which indicates the variation in morphology from pore nuclei to aligned macropores with branching pores, and finally to aligned macropores without branching pores. Due to the difference of Raman peak positions between porous Si layer and substrate (unetched layer), furthermore, z-scan of Raman spectroscopy which is a nondestructive tool can be used to detect the etching depth. The difference should be ascribed to the quantum confinement of phonons in the porous Si. (C) 2015 Elsevier B.V. All rights reserved.