The impact of the dynamic variability due to low frequency and RTN fluctuations on single MOSFET operation from 14 nm FD-SOI technology is investigated for the first time. It is shown that the dynamic variability is enhanced as the rise time and the device area are reduced. Different simulation approaches were investigated to determine the best methodology for simulating the dynamic variability in Cadence circuit simulation tool. It is demonstrated that Monte-Carlo and periodic transient noise simulations are methodologies capable to reproduce accurately dynamic variability in Cadence. (C) 2015 Elsevier Ltd. All rights reserved.