전기화학증착법에 의한 구리박막과 패턴충전 특성

김용안; 양성훈; 이석형; 이경우; 박종완; Yong-An Kim; Sung-Hoon Yang; Seoghyeong Lee; Kyeong-Woo Lee; Jong-Wan Park

Korean Journal of Materials Research, Vol.9, No.6, 583-588, June, 1999

Export Citation

전기화학증착법에 의한 구리박막과 패턴충전 특성

Characteristics of Copper Thin Films and Pattern Filling by Electrochemical Deposition(ECD)

김용안, 양성훈¹, 이석형¹, 이경우¹, 박종완¹

한양대학교 미세구조 반도체공학과
¹한양대학교 금속공학과

Yong-An Kim, Sung-Hoon Yang¹, Seoghyeong Lee¹, Kyeong-Woo Lee¹, and Jong-Wan Park¹

Dept. of Nanostructure Semiconductor Eng., Hanyang Univ., Korea
¹Dept. of Metallurgical Eng., Hanyaπg Univ., 17, Haengdang-dong, Seongdoπg-ku, Seoul 133-791, Korea

초록

전기화학중착법에 의한 구리박막의 특성과 패턴 충전 특성을 연구하였다. 구리박막의 중착에 앞서 seed-Cu/Ta(TaN) /SiO2 (BPSG) /Si 구조를 형성하였다. 씨앗충 (seed layer) 의 전처리 (산화막 제거, wetting) 후 다양한 전류파형 (DC(direct current) /PC (pulsed current), 1~10,000Hz) 과 전류밀도(10~60mA/cm2) 에 따른 구리증착을 수행하였다. PC법을 사용하여 6,000~8,000 Å /min 의 매우 빠른 중착속도로 등각의 패턴충진이 이루어졌다. 열처리한 (450℃, 30분) 구리박막은 1.8~ 2.1uΩㆍcm의 좋은 전기저항을 나타내었다. XRD 해석에 의하면, ECD-Cu/seed-Cu/Ta/SiO2/Si 구조에서 (111) 우선배향된 구리박막이 관찰되었다. 또한, 0.35um 직경과 종횡비가 4:1 인 via hole에 성공적으로 충전하였다.

The characteristics of copper thin films and pattern filling capability were investigated by ECD. Prior to deposition of copper film, seed-Cu/Ta(TaN)/SIO2 (BPSG)/Si structure was manufactured. Copper deposition was performed with various current waveforms(DC/PC, 1~10,000Hz) and current densities(10~60 mA/cm2 ) after pretreatment (Oxident removal, wetting) of seed-layer. Conformal pattern filling was performed using PC method with fast deposition rate of 6,000~8,000 Å /min. Heat-treated( 450℃, 30min) copper films showed good resistivities of 1.8~2.1μΩㆍcm. According to the XRD analysis, (111)-preferred orientation of copper film was found in ECD-Cu/seed-Cu/Ta/SiO2/Si structure. Also, we have successfully achieved to fill via holes with 0.35μm and 4:1 aspect ratio.

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[1] Venkatesan S, Gelatos AV, Misra V, et al., Tech. Dig. Int. Conf. Electron Devices Meeting, 769 (1997)

[2] Edelstein D, Heindenreich J, Goldblatt R, et al., Tech. Dig. Int. Conf. Electron Devices Meeting, 773 (1997)

[3] Dubin VM, TING CH, CHEUNG R, LEE R, CHEN S, Proc. of the Conf. on Advanced Metallization and Interconnect Systems for ULSI Applications in 1997, 405 (1998)

[4] Murarka SP, et al., MRS BULLETIN, 18(6), 46 (1993)

[5] Murarka SP, Gutmann RJ, Kaloyeros AE, Lanford WA, Thin Solid Films, 236(1-2), 257 (1993)

[6] Jackson RL, Broadbent E, Cacouris T, Harrus A, Biberger M, Patton E, Walsh T, Solid State Technol., 41(3), 50 (1998)

[7] Dubin VM, Shachamdiamand Y, Zhao B, Vasudev PK, Ting CH, J. Electrochem. Soc., 144(3), 898 (1997)

[8] Dubin VM, ADEM EH, BERNARD J, SCHONAUER D, BERTRAND J, Proc. of the Conf. on Advanced Metallization and Interconnect Systems for ULSI Applications in 1997, 421 (1998)

[9] Dubin VM, Ting CH, Cheung R : Proc. 14th Int. Conf. VLSI Multilevel Interconnection Conference, Santa Clara, 1997, USA , p. 69.

[10] Contolini RJ, Mayer ST, Graff RT, Tarte L, Bernhardt AF, Solid State Technol., 40(6), 155 (1997)

[11] KWON KW, LEE HJ, RYU CS, SINCLAIR R, WONG SS, Proc. of the Conf. on Advanced Metallization and Interconnect Systems for ULSI Applications in 1997, 712 (1998)