화학공학소재연구정보센터
Solid-State Electronics, Vol.125, 154-160, 2016
Back-gate effects and mobility characterization in junctionless transistor
This work addresses the effect of inter-gate coupling on back-channel characteristics of planar accumulation-mode junctionless (JL) MOSFETs, fabricated with advanced Fully Depleted Silicon-on-Insulator (FDSOI) technology. A systematic methodology to extract and distinguish the contributions of bulk and accumulation-mode mobility has been developed. Front-gate voltage strongly controls the transport properties of back channel in ultra-thin heavily doped JL devices. It is demonstrated that both volume and accumulation-layer mobility values increase when the front interface is in accumulation. (C) 2016 Elsevier Ltd. All rights reserved.