Process Safety and Environmental Protection, Vol.111, 232-243, 2017
An inherently fail-safe electronic logic design for a safety application in nuclear power plant
In this paper, an inherently fail-safe electronic logic circuit is proposed. Further, the logic is investigated for safety critical application in a nuclear power plant with a very low unsafe failure probability requirement. The application involves control circuit for operation of solenoid valves based on the plant state, wherein the de-energization of certain solenoid valves is considered as a safe state. The inherent fail-safeness is achieved by processing the inputs as synchronized pulses rather than static digital levels. Pulse transformers are used at specific locations in the circuit so that energy transition to subsequent stages of the circuit is seized in case of a failure in the previous stage. Such pulse processing is selectively applied to those parts of the circuit for which fail-safe behavior of final control elements is expected. A Failure Mode Effect Analysis (FMEA) is performed for the circuit to systematically ensure that failure of components in postulated modes will result in the fail-safe state. A prototype circuit is built to verify the results obtained from FMEA. The inherency in the circuit is shown to possess a very low unsafe failure probability and quantitatively it is shown. The proposed technique is suggested as a diverse method to control, redundant instrumentation provisions usually provided for safety critical application. This method can be easily extended to similar industrial control involving combinational circuits with modifications. (C) 2017 Institution of Chemical Engineers. Published by Elsevier B.V. All rights reserved.
Keywords:Fail-safe AND gate;Failure Mode Effect Analysis;Inherently fail-safe;Prototype Fast Breeder Reactor;Pulse processing and unsafe failure probability