During high voltage stressing of thin silicon oxides, traps are generated inside of the oxides and at the oxide interfaces. In the trap generation/breakdown model, it has been assumed that the high-voltage induced traps are generated randomly throughout the oxide during wearout. The oxide breaks down when the local density of traps exceeds a critical value. The results of two experiments have indicated that the traps are not generated uniformly inside of the oxide during wearout. These two experiments were 1) the measurement of the time-to-breakdown (TTB) during bipolar stressing and 2) the measurement of the thickness and field dependence of the TTB. The bipolar stressing experiment showed that, in addition to random generation of traps, asperities at the cathodes introduced high local trap densities. The increased TTB during bipolar stressing was correlated with the higher trap densities, implying that the traps generated near asperities at one interface did not align themselves with traps generated near asperities at the other interface. When analyzing the thickness and field dependences of the TTB data, it was found that the TTB was independent of oxide thickness and only depended on the bride field. Fitting of the TTB data to TDDB distributions showed that the trap densities needed to fit the data had to increase as the oxide thickness decreased in order to maintain constant times-to-breakdown for different oxide thicknesses. This result implied a nonuniform distribution of traps throughout the thickness of the oxide, with thinner oxides requiring more traps per unit volume to trigger breakdown than did thicker oxides and more traps being generated near the cathode than near the anode.