Atomic force microscopy has been used to quantitatively determine the surface roughness of silicon substrates as a function of processing and limitations to direct wafer bonding ability. This data is conveniently converted into a power spectrum creating a description of the topography which contains information about the amplitude and frequency of the surface undulations. Following initial characterization, the wafers were subjected to typical device manufacturing processes resulting in various degrees of increased roughness. An empirical correlation was developed between the roughness spectrum and bondability of (100) silicon wafers. Data on the roughening of wafers due to various standard integrated circuit processing steps were obtained and used to identify processes which promote wafer-to-wafer direct bonding. The fractal dimensions of the surfaces have been calculated and are discussed.