Process tolerance and controllability requirements have become more severe with device scaling down and increased integration. The finish of a wafer's back surface is a factor that affects process conditions for dry etching and rapid thermal annealing. The correlation between back-surface roughness and dry-etching characteristics was investigated. The back-surface roughness was changed from 0.34 nm (rms) to 66.7 nm by final back-surface treatment such as mechanical-chemical polishing or chemical etching. Contact-hole etching with CHF3 gas,was performed for interlayer chemical vapor deposited oxide on the front surface of wafers. The etching rate for a smooth back surface (0.34 nm) was increased by 1.1 times over that for a rough back surface (66.7 nm). During contact-hole etching, the wafer temperature of the smooth back surface was 10 degrees C lower than that for a rough back surface. This is due to the difference in electrostatic chucking force (rms=85-125 nm) during contact-hole etching. When the wafer with the smooth back surface was used, the adhesion area between the dry-etching stage and the wafer's back surface increased. Consequently, the wafer can be sufficiently cooled and the etching rate was increased. These experimental results indicate that the roughness of the back surface should be well controlled when fabricating advanced devices.