The narrowest feature on present-day integrated circuits is the gate oxide-the thin dielectric layer that forms the basis of field-effect device structures. Silicon dioxide is the dielectric of choice and, if present miniaturization trends continue, the projected oxide thickness by 2012 will be less than one nanometre, or about five silicon atoms across(1). At least two of those five atoms will be at the silicon-oxide interfaces, and so will have very different electrical and optical properties from the desired bulk oxide, while constituting a significant fraction of the dielectric layer. Here we use electron-energy-loss spectroscopy in a scanning transmission electron microscope to measure the chemical composition and electronic structure, at the atomic scale, across gate oxides as thin as one nanometre. We are able to resolve the interfacial states that result from the spillover of the silicon conduction-band wavefunctions into the oxide. The spatial extent of these states places a fundamental limit of 0.7 nm (four silicon atoms across) on the thinnest: usable silicon dioxide gate dielectric. And for present-day oxide growth techniques, interface roughness will raise this limit to 1.2 nm.