Results of capacitance-voltage (C-V) and capacitance-time measurements performed on Au/porous silicon (PS)/Si diodes having different porosity and morphology of the obtained porous layer are presented. The C-V characteristics of the studied Au/PS/Si diodes are similar to those of poor metal-insulator-semiconductor capacitors. The porosity dependence of the "insulator" capacitance is interpreted by a model assuming two parallel phases. The results obtained indicate that the C-V measurements may be useful for checking (i) the long-term stability of the metal/PS/Si junctions, (ii) the lateral homogeneity of the wafers, and (iii) the thickness and porosity of the porous layer.