Relaxed, graded UHVCVD GeSi layers on Si substrates have been studied to determine the critical processes which control the material quality. Although low threading dislocation densities can be achieved in these relaxed structures, we observe that there is an increase in threading dislocation density with an increase in final Ge concentration in the graded composition layer. Such unexpected behavior for graded layers is connected to the interaction of gliding threading dislocations with the rough surface of the relaxing layer. We have developed a model which can explain the formation of dislocation pile-ups and the associated impact on surface morphology in relaxed, graded GeSi layers. Rare, deep regions of the surface cross-hatch pattern, created by groups of misfit dislocations located in the dislocated graded region, can block gliding threading dislocations, leading to dislocation pile-ups and greater threading dislocation densities. With subsequent growth, the surface becomes more rough due to the influence of the inhomogeneous strain fields on the local growth rate. We show that this vicious cycle of inhomogeneous defect distribution, surface modification, and pile-up formation can be drastically tempered by growing the relaxed layers on off-cut substrates. In addition, we show that the highly dislocated region of the buffer getters background impurities and typically lowers the intrinsic carrier concentration to below 10(14) cm(-3). If the growth temperature of the buffer is too low, however, dislocation glide in the graded region can generate acceptor-like point defects. These point defects can be easily annihilated with a short 900 degrees C anneal. Such behavior is entirely consistent with early results obtained from plastically deformed bulk Si.