Low temperature unhydrogenated in-situ doped polysilicon thin film transistors with a SiO2 deposited gate insulator were fabricated using a four-mask aluminium gate process. Several processes were varied-in particular the deposition pressure of the polysilicon layers, thermal annealing, and cleaning process of the surface of the active layer. The two polysilicon layers, which make up the active layer and the in-situ doped source and drain regions, were deposited at an optimized pressure (P=90 Pa) in the amorphous state and crystallized by a thermal annealing. This procedure was performed before plasma etching of the source/drain polysilicon layer. An oxygen plasma + RCA-type wet cleaning were used to ensure the obtainment of a good APCVD SiO2 gate insulator/active layer interface quality. Therefore, these thin film transistors exhibit good electrical properties:a low threshold voltage (approximate to 2V), a high field effect mobility (>60 cm(2)Vs(-1)), and a high On/Off state current ratio (greater than or equal to 10(7)) for a drain voltage V-ds = 1 V. It is worth noting that these results are similar to those of hydrogenated TFTs made using this type of process. Consequently the TFTs described here could be good candidates for flat panel display applications.