The effects of process-induced fixed oxide charge and interface-traps, as well as high-temperature stress-induced interface traps, on MOSFET mobility are investigated for n-channer 6H-SiC devices with 50-nm gate oxides, both thermally grown and deposited. MOSFET channel mobility in the limit of low interface charge is determined to be 167 cm(2)/V-s in the thermal oxides, for an effective vertical field in the inversion layer of 0.14 MV/cm. Also reported for the first time are mobility degradation coefficients for process-induced and stress-induced charge centers in these oxides.