MESFET's have been processed either on conductive and semi-insulating wafers. After packaging of the dies, load-pull measurements have been performed at 1 and 2 GHz on various gate periphery transistors. A decrease of the power density with gate periphery has been observed. Besides, a maximum value of 2.5W/mm has been obtained with transistors processed on S.I substrate while 4W/mm has been measured on conductive wafer. A shape change of the de I-V characteristics has been shown when high biasing which results in a decrease of the rf sweep power. We think that a high density of deep traps inside the S.I wafers are responsible for such a phenomenon.