We report the first SiGe/Si HFET with a PN junction as a gate electrode. The epitaxial layer structure of the device is grown hv MBE on a relaxed SiGe buffer. A mesa technology is used for device fabrication with implanted contact areas for source and drain and lift off technique for metallization. First DC results show the promising performance of this novel structure with respect to gate leakage current and breakdown voltage.