화학공학소재연구정보센터
Journal of the Electrochemical Society, Vol.147, No.5, 1930-1935, 2000
Low-cost p(-)/p(-) epitaxial silicon wafers for densely packed metal-oxide-semiconductor devices
Improvements of gettering actions in the prototype p(-)/p(-) thin-film silicon epitaxial wafers (1 mu m thick film) have been investigated in conjunction with avoiding failures of crystal-originated "particles" which degraded isolation leakage between memory cells of densely packed metal-oxide-semiconductor (MOS) devices. In order to compensate for the appearance of a kink in current-voltage curves in MOS capacitors caused by undesirable impurities. an optimized gettering and evaluation method are proposed, lending to a low-cost Czochralski-grown substrate. We pinpointed the importance of the epitaxial thickness, proposing an improved type of p(-)/p(-) epitaxial wafer with a 3-5 mu m thick film that is cheaper than current p(-)/p(+) epitaxial wafers. This p(-)/p(-) epitaxial wafer meets the requirements for future miniaturized devices formed on large diameter wafers (e.g., 300 mm diam wafers).