Epitaxial CoSi2 growth for source/drain contacts of a ultra-thin silicon on insulator (SOI) MOSFET is discussed. In order to attain low series resistance, heavily doped Si diffusion layer should be left undepleted under the grown CoSi2. Contact resistance between epitaxial CoSi2 and n(+)Si(001) increases when less than 1 nm Co is deposited. A salicide compatible process, forming a thin epitaxial CoSi2 template by oxide mediated epitaxy followed by reaction deposition epitaxy to increase thickness, is effective in growing CoSi2 epitaxially up to a few tens of nn.