In this paper we present an approach to enhance the breakdown characteristics in vertical short channel metal-oxide semiconductor (MOS) devices. A problem of vertical devices with channel length down to 100 nm is the breakdown, which already takes place at very low source-drain voltages. To overcome this problem we have designed a device with an intrinsic silicon region, which shows a significant enhancement of breakdown behaviour. Our devices show a breakdown voltage up to 14 V together with distinct reduction of short channel effects. A further benefit of using the vertical concept is the employment of local channel doping, leading to lower power dissipation in the MOS-device.