This article describes the formation of amorphous silicon thin film transistors (TFTs) on glass and flexible transparent plastic substrates using rf plasma enhanced chemical vapor deposition and a maximum processing temperature of 110 degrees C. Silane diluted with hydrogen was used for the preparation of the amorphous silicon, and SiH4/NH3/N-2 or SiH4/NH3/N-2/H-2 mixtures were used for the deposition of the silicon nitride gate dielectric. The amorphous silicon nitride layers were characterized by transmission infrared spectroscopy and current-voltage measurements; the plastic substrates were 10 mil thick (0.25 mm) polyethylene terephthalate sheets. Transistors formed using the same process on glass and plastic showed linear mobilities ranging from 0.1 to 0.5 cm(2)/V s with I-ON/I-OFF ratios greater than or equal to 10(7). To characterize the stability of the transistors on glass, n- and p-channel transconductances were measured before and after bias stressing. Devices formed at 110 degrees C show evidence of charge trapping near the a-Si/SiNx interface and the creation of dangling-bond defects. The defect dynamics are consistent with the defect pool model. Under +10 and +25 V bias stress, the rates of creation of low energy defects are only moderately larger than those for high temperature devices; the devices show markedly higher rates of defect creation under higher positive bias. Current-voltage analysis of low temperature dielectrics shows very low leakage, but positive bias stress shows a significantly higher electron trapping rate near the a-Si:H/SiNx interface, indicating problems with low temperature dielectric formation. The magnitude of the rates of defect creation and trapping in these nonoptimized devices suggests that amorphous silicon TFTs with stability approaching that of typical large area active matrix electronic devices could be formed at low temperatures compatible with transparent flexible polymeric substrates. (X) 2000 American Vacuum Society. [S0734-211X(00)05402-0].