We investigated the effects of post-gate anneal and WN sputtering power on the gate dielectric integrity of W/WN/TaOxNy/SiO2/Si metal oxide semiconductor (MOS) capacitors. The process damage induced by physical vapor deposited metal gates in the high-permittivity (k) gate dielectric was partially relieved by a post-gate anneal. This is manifested by reduced leakage current, higher wear-out breakdown voltage, reduced charge trapping, and improved interface characteristics such as reduced hysteresis and interface state density (D-it). We observed a noticeable increase of charge trapping and interfacial roughness at the WN/TaOxNy interface with WN power density while the D-it level remained similar. Degradation in the reliability characteristics with sputtering power density might be attributed to irrecoverable damage in the TaOxNy film.