Polycrystalline silicon thin film transistors (poly-Si TFTs) are used in a wide variety of applications, and will figure prominently in future high-resolution, high-performance flat panel display technology. However, it is very difficult to fabricate high performance poly-Si TFTs at temperatures lower than 300 degreesC and the substrate temperature of the process is limited to less than 600 degreesC on glass. This paper describes a high temperature process above 750 degreesC to obtain poly-Si films. Hydrogenated amorphous silicon (a-Si:H) layer was deposited on a flexible Mo metal substrate and crystallized by rapid thermal annealing for TFT application. The a-Si:H films were crystallized at various temperatures between 750 and 1050 degreesC. As annealing temperature was increased, the TFT exhibited increased transconductance (g(m)) and reduced voltage between drain and source (Vs), the threshold voltage (V-T). The high temperature annealed poly-Si film illustrated field effect mobility higher than 67 cm(2)/Vs. We also investigated the types and activation energies of grain boundary trap, which are the function of annealing temperature. The poly-Si TFT showed an improved I-on/I-off ratio of 10(6), reduced gate threshold voltage, and an increased field effect mobility by three orders.