The introduction of copper interconnects has increased the use of dual damascene etching processes, which leads to new challenges for feature profile control. Oxide fencing around vias during the trench etch of the via-first dual damascene scheme can be detrimental to the device performance and therefore need to be eliminated. A systematic study of oxide fencing formation during via-first dual damascene etching processes is presented. A Monte Carlo technique associated with surface kinetics and cell removal algorithm is used to simulate the profile evolution, and the simulation results qualitatively agree with the experimental results taken from literature. The simulation indicated that the feature profile evolution is controlled by both the ion and neutral flux distribution along the etching surface and angular dependent etching yield. The shape of via, the SiO2: BARC etching selectivity, and etching chemistry can affect the oxide fencing. Bowed via can eliminate the oxide fencing, and tapered via will result in severe oxide fencing. Reducing etching selectivity can also control the height of oxide fencing, but it does not seem to be a practical solution. Less polymerizing chemistry causes much less severe oxide fencing than does more polymerizing chemistry. The simulation can thus serve as a useful guide for searching optimal profile evolution control conditions. (C) 2003 The Electrochemical Society.