A lithographic process capable of manufacturing state of the art chips faces many difficult challenges. Not only must the process resolve the minimum feature size but overlay errors must be held to tight tolerances, exquisitely complex patterns must be printed with high yield, and the overall cost of the process must be acceptable. Achieving acceptable chip cost using an expensive exposure tool is strongly linked to high throughput, and this in turn is linked to resist processes with high sensitivity. In recent years, chemically amplified resist processes have dominated state-of-the-art production because of their high resolution and excellent sensitivity. This article will consider limitations of resolution for production lithography, both the resolution limits of the exposure tool itself and the resolution limits of the resist process. Among the most important considerations for production processes is the tradeoff between resist process sensitivity and resolution. Fundamental reasons underlying the success of optical lithography for manufacturing integrated circuits will be described. These considerations will illuminate the challenges and opportunities for future lithographic methods. (C) 2003 American Vacuum Society.