This article explores electrical characterization methods for silicon-on-insulator (SOI) structures with a nondamaging elastic metal gate (EM gate). Important material electrical properties related to the top silicon layer, gate dielectric and interfaces, and buried oxide are addressed. The techniques utilized are currently under development for SOI and are based on EM-gate capacitance-voltage methods, current-voltage methods, and a back channel metal-oxide-semiconductor transistor that utilizes elastic probes to form a temporary source and drain. (C) 2004 American Vacuum Society.