State-transition faults in digital sequential systems, such as finite-state logic controllers, have traditionally been handled by embedding the given system into a larger one, in a way that preserves the state evolution of the original system while enabling an external mechanism to concurrently perform checks to detect, identify and correct errors. In this paper, we develop a methodology for systematically constructing embeddings of one-hot encoded finite-state machines (FSMs) in a way that allows the external mechanism to capture transient state-transition faults via checks that are performed in a non-concurrent manner (e.g., periodically). More specifically, by employing coding techniques over finite fields, we completely characterize an appropriate class of redundant FSM embeddings and its corresponding non-concurrent error-detecting/identifying capabilities. These embeddings can be used to construct a redundant version of the given one-hot encoded FSM so that the external mechanism can detect and identify errors due to past state-transition faults based on an analysis of the current, possibly corrupted FSM state. As a result, the proposed error detection and identification approach relaxes the stringent requirements on the reliability of the checker and avoids the slowdown associated with concurrent checking. (C) 2004 Elsevier Ltd. All rights reserved.