In this article, we present an optimized thick film photoresist process to compensate for issues such as step coverage, linewidth variations, and long dry etch resistance for hydrogenated amorphous silicon (a-Si:H) devices, such as vertical thin film transistors (VTFTs) with significant substrate topography (1 mum or higher). This article describes a systematic approach to develop an optical lithographic process along with practical process models to analyze the key parameters that control the process throughput and resist charactersistics. The resist performance in dry etching and linewidth control over the topographic structure of VTFrs accompanied with the electrical characteristics of the fabricated device are demonstrated. (C) 2004 American Vacuum Society.