Journal of Vacuum Science & Technology A, Vol.22, No.4, 1500-1505, 2004
Direct trim etching process of Si/SiO2 gate stacks using 193 nm ArF patterns
A polysilicon gate of 30 nm length is successfully fabricated by direct trimming of a gate stack that consists of organic BARC, polycrystalline silicon (poly-Si) and SiO2. It is achieved by patterning the gate stack using a 193 nm photoresist process and trimming the poly-Si gate with HBr/Cl-2 plasma chemistry in an inductively coupled plasma (ICP) etcher. HBr is found to be more effective than Cl-2 as a trimming etchant since it can achieve a higher trimming rate. A maximum trimming rate of 32 nm/min is obtained with gas chemistry of 80% HBr and 20% Cl-2 at 40 mTorr, ICP power of 700 W, and rf bias power of 0 W. In general, the trimming rate increases with an increase in ICP power from 200 to 800 W and decrease in pressure from 70 to 10 mTorr. The inclusion of SF6 and O-2 to the plasma and the longer trimming time are found to be very effective in reducing the poly-Si footprint which is observed after the trimming process. (C) 2004 American Vacuum Society.