A low temperature resist trimming process with low trimming rate and good uniformity was developed. Wafer chuck temperature in the ashing chamber was adjusted to be 6 degreesC to achieve low trimming rate and improve process uniformity. Low power oxygen and argon plasma was used for ashing the resist. Resist lines (0.5 mum wide) patterned with a g-line stepper was trimmed down to sub-100 nm widths. The trimming rate was found to be independent of the initial line width and trimming time. A 0.6 mum CMOS process flow with LOCOS and nitride spacer was suitably modified incorporating resist trimming to fabricate NMOSFETs with gate length as small as 95 nm. Since most polymer-based photoresists can be etched in oxygen plasma, the basic technique could be extended to supplement other lithographic processes for channel length scaling. (C) 2004 Published by Elsevier B.V.