Capacitance-voltage (C-V) technique is used to investigate the electronic properties of Si0.3Ge0.7 hetero layers deposited on fully relaxed Si0.3Ge0.6. This is a fast and nondestructive method to determine important electronic properties, such as, apparent doping concentration, SiGe layer thicknesses, and threshold voltage and valence band offset in a heterostructure. Capacitance transient (C-t) method has been used to determine minority carrier lifetime front the slope of the Zerbst plot and is found to be 23.9 mu s. Interface properties of high-k gate dielectric (ZrO2) deposited on SiGe has also been studied prior to transient capacitance measurements. Average midgap value of interface state density (D-it) extracted from high-frequency C-V measurement is found to be 1.1 x 10(12) cm(-2) eV(-1). (c) 2005 Elsevier B.V. All rights reserved.