To build Cu and low-k dielectric integrated MIM capacitor on standard CMOS silicon substrate for RFIC application, a Ta layer under the capacitor upper plate is necessary for preventing Cu diffusion into Si3N4 dielectric layer of capacitor. In the experiment, delamination was found after 1000 A Ta film deposition on top of Si3N4. SEM inspection revealed that the delamination occurred at the inter-face between BD and Si3N4. The Ta/Si3N4 delamination was solved by inserting a SiO2 layer between BD and Si3N4 layers to compensate the stress difference between the BD and Si3N4/Ta stack films. Full process technology based on Cu and low-k process line for integrating passive device on silicon substrate was thus successfully developed. (c) 2005 Elsevier B.V. All rights reserved.