화학공학소재연구정보센터
Thin Solid Films, Vol.508, No.1-2, 107-111, 2006
Structural and electrical evaluation for strained Si/SiGe on insulator
Three strained Si/SiGe on insulator wafers having different Ge fractions were evaluated using dual-metal-oxide-semiconductor (dual-MOS) deep level transient spectroscopy (DLTS) and transmission electron microscopy (TEM) methods. The interface of SiGe/buried oxide (BOX) shows roughness less than 1 nm by high resolution TEM observation. The interface states densities (D-it) of SiGe/BOX are approximately 1 x 10(12) cm(-2) eV(-1), which is approximately one order of magnitude higher than that of Si/BOX in a Si on insulator wafer measured as reference by the same method of dual-MOS DLTS. The high D-it of SiGe/BOX is not due to interface roughness but due to Ge atoms. The threading dislocations were also clearly observed by TEM and were analyzed. (c) 2005 Elsevier B.V. All rights reserved.